The XC7A50T-3FGG484E has been optimized for low-power applications that require serial transceivers, high DSP, and logic throughput. Provide the lowest total material cost for high-throughput and cost sensitive applications.
The XC7A50T-3FGG484E has been optimized for low-power applications that require serial transceivers, high DSP, and logic throughput. Provide the lowest total material cost for high-throughput and cost sensitive applications.
Functional Features
Advanced high-performance FPGA logic based on true 6-input lookup table technology, configurable as distributed memory.
36 Kb dual port block RAM with built-in FIFO logic for on-chip data buffering.
High performance SelectIO ™ Technology, supporting DDR3 interfaces up to 1866 Mb/s.
High speed serial connection, built-in gigabit transceiver, with speeds ranging from 600 Mb/s to up to 6.6 Gb/s and then to 28.05 Gb/s, providing a special low-power mode optimized for chip to chip interfaces.
The user configurable analog interface integrates a dual channel 12 bit 1MSPS analog-to-digital converter and on-chip thermal and power sensors.
Digital signal processor chip, equipped with 25 x 18 multipliers, 48 bit accumulator, and pre ladder diagram for high-performance filtering, including optimized symmetric coefficient filtering.
A powerful clock management chip that combines phase-locked loops and hybrid mode clock management modules, capable of achieving high precision and low jitter.
PCIe integrated block, suitable for up to x8 Gen3 endpoint and root port designs.
Multiple configuration options, including support for commodity storage, 256 bit AES encryption with HRC/SHA-256 authentication, and built-in SEU detection and correction.
