When designing a four layer PCB circuit board, how to design the stack?
Theoretically, there can be three schemes.
Scheme I
One power layer, one stratum and two signal layers are arranged as follows: top (signal layer), L2 (stratum), L3 (power layer) and BOT (signal layer).
Scheme II
One power layer, one stratum and two signal layers are arranged as follows: top (power layer), L2 (signal layer), L3 (signal layer) and BOT (stratum).
Scheme III
One power layer, one stratum and two signal layers are arranged as follows: top (signal layer), L2 (power layer), L3 (stratum) and BOT (signal layer).
What are the advantages and disadvantages of these three schemes?
Scheme I
This scheme is the main lamination design scheme of four layer PCB. There is a ground plane under the component surface, and the key signals are preferably arranged in the top layer; As for the layer thickness setting, the following suggestions are made: the impedance control core board (GND to power) should not be too thick to reduce the distributed impedance of power supply and ground plane; Ensure the decoupling effect of the power plane.
Scheme II
In order to achieve a certain shielding effect, some schemes put the power supply and ground plane on the top and bottom layers, but this scheme has at least the following defects to achieve an ideal shielding effect:
1. The distance between power supply and ground is too far, and the plane impedance of power supply is large.
2. The power supply and ground plane are extremely incomplete due to the influence of component pads. Because the reference plane is incomplete and the signal impedance is discontinuous, in fact, due to the large number of surface mount devices, when the devices are getting denser and denser, the power supply and ground of this scheme can hardly be used as a complete reference plane, and the expected shielding effect is difficult to achieve;
The application scope of scheme 2 is limited. However, in individual boards, scheme 2 is zui the best layer setting scheme
Scheme III
Similar to scheme 1, this scheme is applicable to the bottom layout of main devices or the bottom wiring of key signals
