The XC6SLX25T-N3CSG324I Spartan-6 FPGA has up to six CMTs, each consisting of two DCMs and one PLL, and can be used alone or in a cascade. The Spartan-6 FPGA extends the density of 3840 to 147443 logic units, with only half the power consumption of the previous Spartan series, and has faster and more comprehensive connectivity. The Spartan-6 series adopts mature 45 nanometer low-power copper process technology, achieving the best balance of cost, power consumption, and performance, providing a new and more efficient dual register 6-input lookup table logic and rich built-in system level blocks.
XCZU9CG-L1FFVB1156I This product integrates a feature rich 64 bit quad core or dual core Arm ® Cortex ® - A53 and dual core Arm Cortex-R5F processing system (based on Xilinx) ® UltraScale? MPSoC architecture. In addition, it also includes on-chip memory, multi port external memory interfaces, and a variety of peripheral connection interfaces.
The XCKU060-2FFVA1156I field programmable gate array can achieve extremely high signal processing bandwidth in mid-range devices and next-generation transceivers. FPGA is a semiconductor device based on a configurable logic block (CLB) matrix connected through a programmable interconnect system
The 10M50DAF484C8G device is a single chip, non-volatile low-cost programmable logic device (PLD) used to integrate the best set of system components.
XCZU47DR-2FFVE1156I Embedded System on Chip (SoC) is a single-chip adaptive RF platform that can meet current and future industry needs. The Zynq UltraScale+RFSoC series can support all frequency bands below 6GHz, meeting the critical requirements of next-generation 5G deployment. At the same time, it can also support direct RF sampling for 14 bit analog-to-digital converters (ADCs) with a sampling rate of up to 5GS/S and 14 bit analog-to-digital converters (DACs) with a sampling rate of 10 GS/S, both of which have an analog bandwidth of up to 6GHz.
The 10AX115R3F40I2LG is the highest performing mid-range 20 nanometer FPGA with 96 full duplex transceivers, supporting a chip to chip data rate of 17.4Gbps. In addition, the FPGA also provides a backplane data transfer rate of up to 12.5 Gbps and up to 1.15 million equivalent logic units.
