AD9528BCPZ produces six outputs with a maximum frequency of 1.25 GHz (output 0 to output 3, output 12, and output 13), as well as eight outputs with a maximum frequency of 1 GHz. Each output can be configured to output directly from PLL1, PLL2,
AD9528BCPZ produces six outputs with a maximum frequency of 1.25 GHz (output 0 to output 3, output 12, and output 13), as well as eight outputs with a maximum frequency of 1 GHz. Each output can be configured to output directly from PLL1, PLL2, or an internal SYSREF generator. Each of the 14 output channels includes a frequency divider with digital phase coarse adjustment function and an analog fine tuned phase delay module, allowing for high flexibility in timing alignment for all 14 outputs. AD9528 can also be used as a flexible dual channel input buffer to achieve the allocation of 14 device clocks and/or SYSREF signals. At startup, AD9528 directly sends VCXO signals to output 12 and output 13 as a start ready clock
application
High performance wireless transceiver
LTE and multi carrier GSM base stations
Wireless and broadband infrastructure
Medical instruments
Provide clocks for high-speed ADC, DAC, DDS, DDC, DUC, and MxFE; Support JESD204B/JESD204C
Low jitter, low phase noise clock allocation
Automatic Test Equipment (ATE) and High Performance Instrumentation
