The 5M570ZT144C5N low-cost and low-power CPLD provides greater density and I/O per footprint. The density of MAX V devices ranges from 40 to 2210 logic elements (32 to 1700 equivalent macro units) and up to 271 I/O, providing programmable solutions for I/O expansion, bus and protocol bridging, power monitoring and control, FPGA configuration, and analog IC interfaces.
The 5M570ZT144C5N low-cost and low-power CPLD provides greater density and I/O per footprint. The density of MAX V devices ranges from 40 to 2210 logic elements (32 to 1700 equivalent macro units) and up to 271 I/O, providing programmable solutions for I/O expansion, bus and protocol bridging, power monitoring and control, FPGA configuration, and analog IC interfaces.
MAX V devices have on-chip flash memory, internal oscillator, and memory functions. Compared with other CPLDs, the total power consumption of MAX V CPLD has been reduced by 50%, requiring only one power supply, which can help you meet low-power design requirements.
Specifications
Programmable type: Programmable within the system
Maximum delay time tpd (1): 9 ns
Supply voltage - Internal: 1.71V~1.89V
Number of logic components/blocks: 570
Number of macro units: 440
I/O count: 114
Working temperature: 0 ° C~85 ° C (TJ)
Installation type: surface mount type
Packaging/Shell: 144-LQFP
Supplier Device Packaging: 144-TQFP (20x20)
