The design of 5CEBA2F23C8N can simultaneously meet the decreasing power consumption, cost, and time to market requirements, as well as the increasing bandwidth demands of high-capacity and cost sensitive applications. Due to the integration of transceivers and hard memory controllers
The design of 5CEBA2F23C8N can simultaneously meet the decreasing power consumption, cost, and time to market requirements, as well as the increasing bandwidth demands of high-capacity and cost sensitive applications. Due to the integration of transceivers and hard memory controllers, 5CEBA2F23C8N is suitable for applications in industrial, wireless and wired, military, and automotive markets.
5CEBA2F23C8N has a variable precision DSP block that supports these functions:
Can be configured to support signal processing accuracies of 9 x 9, 18 x 18, and 27 x 27 bits.
64 bit accumulator
Hard pre adder with 18 bit and 27 bit modes
Cascaded output adder for efficient contraction finite impulse response (FIR) filters
Internal coefficient register group, with a depth of 8, used for each multiplier mode in 18 bit or 27 bit mode
• Completely independent multiplier operation
The second accumulator feedback register is designed to accommodate complex multiplication and accumulation functions
• Fully independent and effective support for single precision floating-point operations
Intel Quartus Prime design software can infer all modes
