10CL080YU484C8G has been optimized for low cost and low static power consumption, making it an ideal choice for large-scale and cost sensitive applications.
10CL080YU484C8G has been optimized for low cost and low static power consumption, making it an ideal choice for large-scale and cost sensitive applications.
The 10CL080YU484C8G device provides high-density programmable gates, onboard resources, and universal I/O. These resources can meet the requirements of I/O expansion and chip to chip interface.
characteristic
1.0 V and 1.2 V kernel voltage options
Provide commercial, industrial, and automotive temperature levels
Multiple device densities with pin migration function
Compliant with RoHS6 standards
Logic Element (LE) - Four Input Lookup Table (LUT) and Register
All LE have extensive wiring/metal interconnections between them
One 18x18 or two 9x9 multiplier modes that can be cascaded
Complete DSP IP for algorithm acceleration
Supports multiple I/O standards
Programmable I/O function
Real LVDS and analog LVDS transmitters and receivers
On Chip Terminal (OCT)
Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP)
JTAG configuration scheme
Configure data decompression
Remote system upgrade
Up to four universal PLLs
Provide powerful clock management and synthesis functions, which can drive the global clock of the entire device and power all device quadrants
Up to 15 dedicated clock pins, capable of driving up to 20 global clocks
